Determination of Wafer Start Mix in Semiconductor Manufacturing During New Technology Ramp-Up: Model, Solution Method, and an Empirical Study
针对半导体新技术爬坡中工程批与正常批的晶圆启动组合问题，提出渐进仿真优化方法，在满足正常批周期时间要求下最大化工程批产出，并用实际数据验证了可行性。
In semiconductor manufacturing, production ramp-up is a necessary phase before a new technology is introduced because it affects not only the time-to-market, but also the time-to-volume (the time to reach mass production). In production ramp-up, engineering lots are implemented in order to collect data for product and equipment qualification, and they are expected to achieve short cycle times (CTs) and high throughputs. On one hand, the increment of the amount of engineering lots will disrupt the smoothness of the manufacturing flow and cause work-in-process (WIP) bubbles. On the other hand, to ensure the feasibility of the production plan, some throughput and CT targets must be achieved. There is a need to determine an appropriate wafer start mix to strike a balance between the conflicting objectives. However, the complexity and stochasticity existing in the semiconductor manufacturing process makes it a very difficult task. This paper modeled the wafer start mix determination problem and proposed an efficient methodology, called progressive simulation optimization (PSO), based on the simulation metamodeling techniques to handle this problem. The goal was to find the optimal wafer start mix that enables maximum throughput of engineering lots, while satisfying the requirement of CT of normal lots (NL). A numerical study was conducted to evaluate the performance of the proposed PSO, and an empirical study based on real data was conducted to validate the viability of the proposed methodology in practice.