RAVEN: A Virtual Platform for RISC-V Microarchitectural Security
提出了基于gem5的虚拟仿真平台RAVEN，用于评估RISC-V处理器的微架构安全，支持缓存层次建模、攻击仿真和基于硬件性能计数器的机器学习检测，验证了五种侧信道攻击的检测效果。
The rise of the open-source RISC-V Instruction Set Architecture (ISA) has highlighted the critical need for a standardized framework for microarchitectural security evaluation, a gap that challenges the development of secure-by-design hardware. To address this, we present a novel virtual simulation platform, RAVEN, for evaluating the microarchitectural security of RISC-V processors. Built on the gem5 simulator, the proposed framework enables detailed modeling of cache hierarchies, integration of custom hardware performance counters, and fine-grained analysis of timing-based side-channel vulnerabilities. The platform is designed to support both attack emulation and automated detection, providing a flexible environment for architecture-level security evaluation. We validate the platform by implementing and analyzing five representative microarchitectural attacks: Spectre , Evict+Time , Evict+Spec+Time , Flush+Fault , and GhostRace . To detect these attacks, we integrate a machine learning-based detection pipeline that leverages hardware performance counter data to identify anomalous microarchitectural behavior. Our experimental results across multiple classifiers show high detection accuracy, demonstrating the platform’s effectiveness in distinguishing side-channel activity from benign execution. Overall, the extensible gem5-based platform provides a practical and scalable foundation for security research on the open RISC-V ISA, supporting both attack analysis and the development of secure-by-design hardware.